/* These "optional" allocation calls help prevent drivers from stomping * on each other, and help provide better diagnostics in debugfs. * They're called even less than the "set direction" calls. */ int gpio_request(unsigned gpio, const char *label) { struct gpio_desc *desc; struct gpio_chip *chip; int status = -EINVAL; unsigned long flags; spin_lock_irqsave(&gpio_lock, flags); if (!gpio_is_valid(gpio)) goto done; // 這兒從 gpio_desc 數組中取了1個 gpio_desc 結構體 // 后面的代碼基本上都是基于這個結構體進行的操作 // 我們是從數組中取了1個 gpio 的描寫，這個描寫應當是在 gpio 注冊的時候添加到這個數組的 // 以這個數組為線索，看看 gpio 是如何注冊的 desc = &gpio_desc[gpio]; chip = desc->chip; if (chip == NULL) goto done; if (!try_module_get(chip->owner)) goto done; /* NOTE: gpio_request() can be called in early boot, * before IRQs are enabled, for non-sleeping (SOC) GPIOs. */ if (test_and_set_bit(FLAG_REQUESTED, &desc->flags) == 0) { desc_set_label(desc, label ? : "?"); status = 0; } else { status = -EBUSY; module_put(chip->owner); goto done; } if (chip->request) { /* chip->request may sleep */ spin_unlock_irqrestore(&gpio_lock, flags); status = chip->request(chip, gpio - chip->base); spin_lock_irqsave(&gpio_lock, flags); if (status < 0) { desc_set_label(desc, NULL); module_put(chip->owner); clear_bit(FLAG_REQUESTED, &desc->flags); } } done: if (status) pr_debug("gpio_request: gpio-%d (%s) status %d ", gpio, label ? : "?", status); spin_unlock_irqrestore(&gpio_lock, flags); return status; }

static struct gpio_desc gpio_desc[ARCH_NR_GPIOS];

if (!initialed) /* its a serious configuration bug when it fails */ BUG_ON(gpiochip_add(&port[i].chip) < 0);

int mx6q_register_gpios(void) { /* 7 ports for Mx6 */ return mxc_gpio_init(mxc_gpio_ports, 7); }

static struct mxc_gpio_port mxc_gpio_ports[] = { { .chip.label = "gpio-0", .base = IO_ADDRESS(GPIO1_BASE_ADDR), .irq = MXC_INT_GPIO1_INT15_0_NUM, .irq_high = MXC_INT_GPIO1_INT31_16_NUM, .virtual_irq_start = MXC_GPIO_IRQ_START }, { .chip.label = "gpio⑴", .base = IO_ADDRESS(GPIO2_BASE_ADDR), .irq = MXC_INT_GPIO2_INT15_0_NUM, .irq_high = MXC_INT_GPIO2_INT31_16_NUM, .virtual_irq_start = MXC_GPIO_IRQ_START + 32 * 1 }, { .chip.label = "gpio⑵", .base = IO_ADDRESS(GPIO3_BASE_ADDR), .irq = MXC_INT_GPIO3_INT15_0_NUM, .irq_high = MXC_INT_GPIO3_INT31_16_NUM, .virtual_irq_start = MXC_GPIO_IRQ_START + 32 * 2 }, { .chip.label = "gpio⑶", .base = IO_ADDRESS(GPIO4_BASE_ADDR), .irq = MXC_INT_GPIO4_INT15_0_NUM, .irq_high = MXC_INT_GPIO4_INT31_16_NUM, .virtual_irq_start = MXC_GPIO_IRQ_START + 32 * 3 }, { .chip.label = "gpio⑷", .base = IO_ADDRESS(GPIO5_BASE_ADDR), .irq = MXC_INT_GPIO5_INT15_0_NUM, .irq_high = MXC_INT_GPIO5_INT31_16_NUM, .virtual_irq_start = MXC_GPIO_IRQ_START + 32 * 4 }, { .chip.label = "gpio⑸", .base = IO_ADDRESS(GPIO6_BASE_ADDR), .irq = MXC_INT_GPIO6_INT15_0_NUM, .irq_high = MXC_INT_GPIO6_INT31_16_NUM, .virtual_irq_start = MXC_GPIO_IRQ_START + 32 * 5 }, { .chip.label = "gpio⑹", .base = IO_ADDRESS(GPIO7_BASE_ADDR), .irq = MXC_INT_GPIO7_INT15_0_NUM, .irq_high = MXC_INT_GPIO7_INT31_16_NUM, .virtual_irq_start = MXC_GPIO_IRQ_START + 32 * 6 }, };

MACHINE_START(MX6XXXX, "Freescale i.MX 6 Board") .boot_params = MX6_PHYS_OFFSET + 0x100, .fixup = fixup_mxc_board, .map_io = mx6_map_io, .init_irq = mx6_init_irq, .init_machine = mx6_board_init, .timer = &mxc_timer, .reserve = mx6q_reserve, MACHINE_END

void __init init_IRQ(void) { machine_desc->init_irq(); }

int mxc_gpio_init(struct mxc_gpio_port *port, int cnt) { int i, j; static bool initialed; /* save for local usage */ // port 是前面定義的數組 mxc_gpio_ports ， cnt 是數組中元素的個數 mxc_gpio_ports = port; gpio_table_size = cnt; printk(KERN_INFO "MXC GPIO hardware "); for (i = 0; i < cnt; i++) { /* disable the interrupt and clear the status */ __raw_writel(0, port[i].base + GPIO_IMR); __raw_writel(~0, port[i].base + GPIO_ISR); for (j = port[i].virtual_irq_start; j < port[i].virtual_irq_start + 32; j++) { irq_set_lockdep_class(j, &gpio_lock_class); /* static struct irq_chip gpio_irq_chip = { .name = "GPIO", .irq_ack = gpio_ack_irq, .irq_mask = gpio_mask_irq, .irq_unmask = gpio_unmask_irq, .irq_set_type = gpio_set_irq_type, .irq_set_wake = gpio_set_wake_irq, }; */ /** * handle_level_irq - Level type irq handler * @irq: the interrupt number * @desc: the interrupt description structure for this irq * * Level type interrupts are active as long as the hardware line has * the active level. This may require to mask the interrupt and unmask * it after the associated handler has acknowledged the device, so the * interrupt line is back to inactive. */ irq_set_chip_and_handler(j, &gpio_irq_chip, handle_level_irq); set_irq_flags(j, IRQF_VALID); } /* register gpio chip */ // mxc_gpio_direction_input 將對應 gpio 設置為輸入， mxc_gpio_direction_output 將對應 gpio 設置為輸出，并會設置1個初始值 // 這兒的輸入/輸出是對 cpu 來講的 port[i].chip.direction_input = mxc_gpio_direction_input; port[i].chip.direction_output = mxc_gpio_direction_output; // 獲得/設置 gpio 狀態 port[i].chip.get = mxc_gpio_get; port[i].chip.set = mxc_gpio_set; port[i].chip.base = i * 32; port[i].chip.ngpio = 32; spin_lock_init(&port[i].lock); if (!initialed) /* its a serious configuration bug when it fails */ // 添加 gpio chip , 調用的是我們前面用到的1個線索函數， 該函數中有給 gpio_desc 數組賦值 BUG_ON(gpiochip_add(&port[i].chip) < 0); if (cpu_is_mx1() || cpu_is_mx3() || cpu_is_mx25() || cpu_is_mx51() || cpu_is_mx53() || cpu_is_mx6q() || cpu_is_mx6dl() || cpu_is_mx6sl()) { /* setup one handler for each entry */ irq_set_chained_handler(port[i].irq, mx3_gpio_irq_handler); irq_set_handler_data(port[i].irq, &port[i]); if (port[i].irq_high) { /* setup handler for GPIO 16 to 31 */ irq_set_chained_handler(port[i].irq_high, mx3_gpio_irq_handler); irq_set_handler_data(port[i].irq_high, &port[i]); } } } initialed = true; if (cpu_is_mx2()) { /* setup one handler for all GPIO interrupts */ irq_set_chained_handler(port[0].irq, mx2_gpio_irq_handler); irq_set_handler_data(port[0].irq, port); } return 0; }

/** * gpiochip_add() - register a gpio_chip * @chip: the chip to register, with chip->base initialized * Context: potentially before irqs or kmalloc will work * * Returns a negative errno if the chip can't be registered, such as * because the chip->base is invalid or already associated with a * different chip. Otherwise it returns zero as a success code. * * When gpiochip_add() is called very early during boot, so that GPIOs * can be freely used, the chip->dev device must be registered before * the gpio framework's arch_initcall(). Otherwise sysfs initialization * for GPIOs will fail rudely. * * If chip->base is negative, this requests dynamic assignment of * a range of valid GPIOs. */ int gpiochip_add(struct gpio_chip *chip) { unsigned long flags; int status = 0; unsigned id; int base = chip->base; if ((!gpio_is_valid(base) || !gpio_is_valid(base + chip->ngpio - 1)) && base >= 0) { status = -EINVAL; goto fail; } spin_lock_irqsave(&gpio_lock, flags); if (base < 0) { base = gpiochip_find_base(chip->ngpio); if (base < 0) { status = base; goto unlock; } chip->base = base; } /* these GPIO numbers must not be managed by another gpio_chip */ for (id = base; id < base + chip->ngpio; id++) { if (gpio_desc[id].chip != NULL) { status = -EBUSY; break; } } if (status == 0) { for (id = base; id < base + chip->ngpio; id++) { // 發現這兒只是賦值了 gpio_desc 成員的 chip 成員 gpio_desc[id].chip = chip; /* REVISIT: most hardware initializes GPIOs as * inputs (often with pullups enabled) so power * usage is minimized. Linux code should set the * gpio direction first thing; but until it does, * we may expose the wrong direction in sysfs. */ gpio_desc[id].flags = !chip->direction_input ? (1 << FLAG_IS_OUT) : 0; } } of_gpiochip_add(chip); unlock: spin_unlock_irqrestore(&gpio_lock, flags); if (status) goto fail; // 創建裝備， 并添加對應的 sysfs status = gpiochip_export(chip); if (status) goto fail; return 0; fail: /* failures here can mean systems won't boot... */ pr_err("gpiochip_add: gpios %d..%d (%s) failed to register ", chip->base, chip->base + chip->ngpio - 1, chip->label ? : "generic"); return status; }

struct gpio_desc { struct gpio_chip *chip; unsigned long flags; /* flag symbols are bit numbers */ #define FLAG_REQUESTED 0 #define FLAG_IS_OUT 1 #define FLAG_RESERVED 2 #define FLAG_EXPORT 3 /* protected by sysfs_lock */ #define FLAG_SYSFS 4 /* exported via /sys/class/gpio/control */ #define FLAG_TRIG_FALL 5 /* trigger on falling edge */ #define FLAG_TRIG_RISE 6 /* trigger on rising edge */ #define FLAG_ACTIVE_LOW 7 /* sysfs value has active low */ #define ID_SHIFT 16 /* add new flags before this one */ #define GPIO_FLAGS_MASK ((1 << ID_SHIFT) - 1) #define GPIO_TRIGGER_MASK (BIT(FLAG_TRIG_FALL) | BIT(FLAG_TRIG_RISE)) #ifdef CONFIG_DEBUG_FS const char *label; #endif };